The current uptake in high performance computing means mostly good things, but it also comes with a few built-in challenges. The paradox of this particular progress is this: when you scale hardware, you oftentimes scale power consumption, right along with it. That’s where Intel’s Shesha Krishnapura has some good news to share, in this podcast speaking with The Register’s Tim Phillips. Says Krishnapura, “In the past, that power relationship has existed. But with Intel’s core microarchitecture platform, the power holds constant while performance climbs.”
Intel is working to improve the performance-per-watt characteristics of HPC systems. The effort is important, as Xeon-based servers dominate the Top 500 supercomputers list and the clusters used by businesses for their most demanding jobs.
Fist of all, Intel’s throughput-per-rack measurement helps illustrate the point when Intel 45nm-based quad-core processors run at similar power levels as dual-core processors, while offering twice the number of processing cores per server. Add Intel’s switch to higher density memory like 4GB memory modules instead of 2GB modules — the 4GB run at similar power envelope — and it’s clear where Intel is holding a fairly stable power envelope and still seen what Krishnapura calls, “a substantial performance increase, year after ...
High-performance computing presents unique challenges in performance, energy efficiency and parallel processing, and Intel has just unveiled a unique solution. The Intel Xeon processors and platforms use an entirely new transistor formula based on the second generation of the Intel Core microarchitecture. Intel’s new high-performance computing (HPC) platform ...
In his keynote today at the Intel Developer Forum in San Francisco, Patrick Gelsinger, senior vice president and general manager of Intel’s Digital Enterprise Group, gave a broad update on Intel’s efforts this year.
In this podcast, Gelsinger covers what he calls the company’s “relentless pursuit of Moore’s Law,” spotlighting
45nm Program Manager Kaizad Mistry takes you inside the groundbreaking 45nm Hi-k metal gate process technology used in the next generation of Intel Core microarchitecture. Related stories: Intel, IntelMooresLaw Kirk Skaugen is vice president of the Digital Enterprise Group and co-general manager of the Intel Server Platforms Group . In this podcast Skaugen talks about practical applications for Intel’s server and workstation platforms working with Intel’s Core Microarchitecture such as the Xeon 5100. More info: Intel Developer Forum - Justin Rattner, CTO Keynote Part 1 of 3 - March 7, 2006, San Francisco “Join Justin Rattner for a technology tour de force on the key challenges facing the industry and Intel’s multifaceted response of complete platform solutions - from transistors through software. Justin will ...Inside 45nm Hi-k Silicon Innovation - Intel Chip Chat - Episode 7
Core Microarchitecture in Servers: Intel's Kirk Skaugen
IntelStartYourEngines.comCore Microarchitecture in Servers: Intel's Thomas Kilroy
Tom Kilroy is vice president and general manager of Intel Corporation’s Digital Enterprise Group. He covers computing and communications infrastructure platforms for business. In this podcast he introduces Intel’s new microprocessor for server computers, the first chips built with Intel’s ...Intel - Justin Rattner, CTO - Core Microarchitecture, IDF Keynote - 1 of 3 parts
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