In this audio podcast, Nehalem lead architect Ronak Singhal discusses the significant performance and power improvements of Intel’s latest leap in microarchitectural design. The technology has significant implications for dynamic scalability, design and performance scalability, simultaneous multi-threading, scalable shared memory and multi-level shared caching. The ground-up design takes advantage of the hafnium-based Intel 45nm hi-k metal gate silicon technology, and is the first to introduce Intel QuickPath technology.
Intel is now shipping Xeon processors built via a 45nm manufacturing process. These chips exhibit some of the best performance per watt characteristics on the market. Later in 2008, however, Intel plans to advance its silicon again via a new architecture code-named Nehalem. Chips built with this architecture will show ...
Introducing Intel’s next-gen distributed shared memory architecture featuring high speed interconnects.
Related Stories: IntelIDF, IntelMooresLaw
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