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		<title>interconnect Search - Powered by PodTech.net</title>
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<pubDate>Wed, 26 Nov 2008 08:01:04 +0000</pubDate>
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<itunes:summary>PodTech is a leading online video network featuring original technology and digital entertainment programming. PodTech's media platform allows professional content producers to deliver their content to millions of people who can easily find, share, and interact with it. For advertisers, PodTech offers unique, highly contextual ways to reach and measure target audiences through the fastest growing, most viral medium of online video. PodTech has over 40 clients including advertisers such as IBM, Intel, Hewlett Packard, Seagate, and Symantec. Founded in 2005, PodTech Network is based in Palo Alto, California, and is funded by US Venture Partners and Venrock Associates.</itunes:summary>
	
	

	<item>
		<title>PCI Express 3.0* Intel Chip Chat - Episode 36</title>
		<link>http://www.podtech.net/home/5444/pci-express-30-intel-chip-chat-episode-36</link>
		<comments>http://www.podtech.net/home/5444/pci-express-30-intel-chip-chat-episode-36#comments</comments>
		<pubDate>Wed, 19 Nov 2008 08:01:35 +0000</pubDate>
		<dc:creator>editor</dc:creator>
		
		<category><![CDATA[Intel Chip Chat]]></category>

		<category><![CDATA[Featured Episode]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/5444/pci-express-30-intel-chip-chat-episode-36</guid>
		<description><![CDATA[PCIe 3.0 will double the bandwidth of the previous generation of this I/O interconnect and will improve power management of platforms - from notebooks to new generation servers.
Tags: PCIe,  PCIe 3.0,  PCI Express,  Intel,  Intel Chip Chat
]]></description>
			<content:encoded><![CDATA[<p>PCIe 3.0 will double the bandwidth of the previous generation of this I/O interconnect and will improve power management of platforms - from notebooks to new generation servers.</p>
<p>Tags: <a href="http://www.podtech.net/home/search/PCIe" rel="tag">PCIe</a>, <a href="http://www.podtech.net/home/search/PCIe+3.0" rel="tag"> PCIe 3.0</a>, <a href="http://www.podtech.net/home/search/PCI+Express" rel="tag"> PCI Express</a>, <a href="http://www.podtech.net/home/search/Intel" rel="tag"> Intel</a>, <a href="http://www.podtech.net/home/search/Intel+Chip+Chat" rel="tag"> Intel Chip Chat</a></p>
]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2008/11/PID_013835/Podtech_Intel_PCI_Express_3_chip_chat_.mp3" length="7025014" type="audio/mpeg"/>

	<itunes:author>Editor </itunes:author>
<itunes:duration>07:18</itunes:duration>
<itunes:keywords>intel-chip-chat, featured-episode, corporate, intel</itunes:keywords>
	</item>
	
	

	<item>
		<title>45nm and Beyond with Christopher Peters</title>
		<link>http://www.podtech.net/home/5105/45nm-and-beyond-with-christopher-peters</link>
		<comments>http://www.podtech.net/home/5105/45nm-and-beyond-with-christopher-peters#comments</comments>
		<pubDate>Tue, 22 Apr 2008 22:17:47 +0000</pubDate>
		<dc:creator>editor</dc:creator>
		
		<category><![CDATA[Intel Nehalem]]></category>

		<category><![CDATA[Intel-OpenPort]]></category>

		<category><![CDATA[Featured Episode]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/5105/45nm-and-beyond-with-christopher-peters</guid>
		<description><![CDATA[Intel is now shipping Xeon processors built via a 45nm manufacturing process. These chips exhibit some of the best performance per watt characteristics on the market. Later in 2008, however, Intel plans to advance its silicon again via a new architecture code-named Nehalem. Chips built with this architecture will show strong single-thread and multi-threaded performance [...]]]></description>
			<content:encoded><![CDATA[<p>Intel is now shipping Xeon processors built via a 45nm manufacturing process. These chips exhibit some of the best performance per watt characteristics on the market. Later in 2008, however, Intel plans to advance its silicon again via a new architecture code-named Nehalem. Chips built with this architecture will show strong single-thread and multi-threaded performance and include an integrated memory controller along with the new QuickPath Interconnect. In this podcast, find out how Intel expects this technology affect performance per watt of the Xeon line.</p>
<p>Tags: <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/Xeon" rel="tag"> Xeon</a>, <a href="http://www.podtech.net/home/search/45nm" rel="tag"> 45nm</a>, <a href="http://www.podtech.net/home/search/Nehalem" rel="tag"> Nehalem</a>, <a href="http://www.podtech.net/home/search/QuickPath" rel="tag"> QuickPath</a></p>
]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2008/04/PID_013524/Podtech_Intel_what_is_next_for_Xeon_ipod.mp4" length="16298187" type="video/mpeg"/>

	<itunes:author>Editor </itunes:author>
<itunes:duration>05:08</itunes:duration>
<itunes:keywords>intel-nehalem, intel-openport, featured-episode, corporate, intel</itunes:keywords>
	</item>
	
	

	<item>
		<title>USB 3.0 &#038; Wireless USB Technology - Intel Chip Chat - Episode 24</title>
		<link>http://www.podtech.net/home/4757/usb-30-wireless-usb-technology-intel-chip-chat-episode-24</link>
		<comments>http://www.podtech.net/home/4757/usb-30-wireless-usb-technology-intel-chip-chat-episode-24#comments</comments>
		<pubDate>Thu, 20 Dec 2007 16:00:23 +0000</pubDate>
		<dc:creator>editor</dc:creator>
		
		<category><![CDATA[Commissioned]]></category>

		<category><![CDATA[Intel Chip Chat]]></category>

		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel]]></category>

		<category><![CDATA[Intel Developer Forum]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/4757/usb-30-wireless-usb-technology-intel-chip-chat-episode-24</guid>
		<description><![CDATA[Explore the latest innovations in one of the most successful interconnect technologies in computing history – the Universal Serial Bus (USB). 
Related Stories: Intel, IntelMooresLaw, IDF
Tags: interconnect, Universal Serial Bus, USB, Intel, IntelMooresLaw, IDF]]></description>
			<content:encoded><![CDATA[<p>Explore the latest innovations in one of the most successful interconnect technologies in computing history – the Universal Serial Bus (USB). </p>
<p>Related Stories: <a href="http://www.podtech.net/home/search/Intel">Intel</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw">IntelMooresLaw</a>, <a href="http://www.podtech.net/home/search/IDF">IDF</a></p>
<p>Tags: <a href="http://www.podtech.net/home/search/interconnect" rel="tag">interconnect</a>, <a href="http://www.podtech.net/home/search/Universal+Serial+Bus" rel="tag">Universal Serial Bus</a>, <a href="http://www.podtech.net/home/search/USB" rel="tag">USB</a>, <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw" rel="tag">IntelMooresLaw</a>, <a href="http://www.podtech.net/home/search/IDF" rel="tag">IDF</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2007/12/PID_013201/Podtech_Intel_Chip_Chat_30.mp3" length="5229888" type="audio/mpeg"/>

	<itunes:author>Editor </itunes:author>
<itunes:duration>10:54</itunes:duration>
<itunes:keywords>commissioned, intel-chip-chat, podtech, corporate, intel, intel-developer-forum, technology</itunes:keywords>
	</item>
	
	

	<item>
		<title>Intel QuickPath Architecture - Intel Chip Chat - Episode 11a</title>
		<link>http://www.podtech.net/home/4167/intel-quickpath-architecture-intel-chip-chat-episode-11a</link>
		<comments>http://www.podtech.net/home/4167/intel-quickpath-architecture-intel-chip-chat-episode-11a#comments</comments>
		<pubDate>Thu, 20 Sep 2007 02:24:20 +0000</pubDate>
		<dc:creator>editor</dc:creator>
		
		<category><![CDATA[Intel Moore's Law]]></category>

		<category><![CDATA[Intel Chip Chat]]></category>

		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel Developer Forum]]></category>

		<category><![CDATA[Intel]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/4167/intel-quickpath-architecture-intel-chip-chat-episode-11a</guid>
		<description><![CDATA[Introducing Intel&#8217;s next-gen distributed shared memory architecture featuring high speed interconnects.
Related Stories: IntelIDF, IntelMooresLaw
Tags: Intel, interconnects, IntelIDF, IntelMooresLaw]]></description>
			<content:encoded><![CDATA[<p>Introducing Intel&#8217;s next-gen distributed shared memory architecture featuring high speed interconnects.</p>
<p>Related Stories: <a href="http://www.podtech.net/home/?s=intel%20idf">IntelIDF</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw">IntelMooresLaw</a></p>
<p>Tags: <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/interconnects" rel="tag">interconnects</a>, <a href="http://www.podtech.net/home/search/IntelIDF" rel="tag">IntelIDF</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw" rel="tag">IntelMooresLaw</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2007/09/PID_012604/Podtech_Intel_Chip_Chat_11a.mp3" length="2995606" type="audio/mpeg"/>

	<itunes:author>Editor </itunes:author>
<itunes:duration>06:14</itunes:duration>
<itunes:keywords>intel-moores-law, intel-chip-chat, podtech, corporate, intel-developer-forum, intel</itunes:keywords>
	</item>
	
	

	<item>
		<title>LunchMeet: Tracking Memes with Tailrank</title>
		<link>http://www.podtech.net/home/3524/lunchmeet-tracking-memes-with-tailrank</link>
		<comments>http://www.podtech.net/home/3524/lunchmeet-tracking-memes-with-tailrank#comments</comments>
		<pubDate>Sat, 07 Jul 2007 02:26:15 +0000</pubDate>
		<dc:creator>Eddie Codel</dc:creator>
		
		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Enterprise 2.0]]></category>

		<category><![CDATA[LunchMeet]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/3524/lunchmeet-tracking-memes-with-tailrank</guid>
		<description><![CDATA[The blogosphere is a noisy place filled with many interconnected conversations on all sorts of disperate topics. Tailrank, which calls itself a memetracker, is a service that tracks the zeitgeist of conversations in the blogosphere. I sat down with Kevin Burton, Tailrank&#8217;s CEO and founder, and Jonathan Moore, brilliant engineer and hacker, at their home [...]]]></description>
			<content:encoded><![CDATA[<p>The blogosphere is a noisy place filled with many interconnected conversations on all sorts of disperate topics. <a href="http://tailrank.com">Tailrank</a>, which calls itself a memetracker, is a service that tracks the zeitgeist of conversations in the blogosphere. I sat down with Kevin Burton, Tailrank&#8217;s CEO and founder, and Jonathan Moore, brilliant engineer and hacker, at their home office to learn a bit about their services. Tailrank is built upon <a href="http://spinn3r.com/">Spinn3r</a>, another service that Burton and Moore built, that spiders and indexes the blogosphere.</p>
<p>Tags: <a href="http://www.podtech.net/home/search/blogosphere" rel="tag">blogosphere</a>, <a href="http://www.podtech.net/home/search/Tailrank" rel="tag">Tailrank</a>, <a href="http://www.podtech.net/home/search/memetracker" rel="tag">memetracker</a>, <a href="http://www.podtech.net/home/search/Kevin+Burton" rel="tag">Kevin Burton</a>, <a href="http://www.podtech.net/home/search/Jonathan+Moore" rel="tag">Jonathan Moore</a>, <a href="http://www.podtech.net/home/search/Spinn3r" rel="tag">Spinn3r</a></p>]]></content:encoded>
			<wfw:commentRss>http://www.podtech.net/home/3524/lunchmeet-tracking-memes-with-tailrank/feed</wfw:commentRss>
		 
	        <enclosure url="http://media1.podtech.net/media/2007/07/PID_011823/Podtech_LM61_Tailrank_ipod.mp4" length="62149933" type="video/mp4"/>

	<itunes:author>Eddie Codel</itunes:author>
<itunes:duration>16:30</itunes:duration>
<itunes:keywords>podtech, tech, lunchmeet</itunes:keywords>
	</item>
	
	

	<item>
		<title>Intel Scientists Talk Tereflops</title>
		<link>http://www.podtech.net/home/2107/intel-scientists-talk-tereflops</link>
		<comments>http://www.podtech.net/home/2107/intel-scientists-talk-tereflops#comments</comments>
		<pubDate>Wed, 14 Feb 2007 01:47:13 +0000</pubDate>
		<dc:creator>editor</dc:creator>
		
		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Intel Moore's Law]]></category>

		<category><![CDATA[Intel PCA Past and Future]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/2107/intel-scientists-talk-tereflops</guid>
		<description><![CDATA[This is a video of Intel engineers talking about their research into 80-core chip technology. PodTech&#8217;s interview with Intel CTO Justin Rattner about the company&#8217;s 80-core announcement can be found here.
Commissioned by Intel.
Related Stories: IntelMooresLaw
More Information:
Intel Tera-Scale Research (80-Core animation available on this site)
Intel Pressroom
Technolgy @ Intel Magazine
Intel Technology Journal
Transcript:
Guest: Nitin Borkar - Intel
Guest: Saurabh [...]]]></description>
			<content:encoded><![CDATA[<p>This is a video of Intel engineers talking about their research into 80-core chip technology. PodTech&#8217;s interview with Intel CTO Justin Rattner about the company&#8217;s 80-core announcement can be <a href="http://www.podtech.net/home/technology/2080/intel-proposes-80-core-for-your-laptop">found here</a>.</p>
<p>Commissioned by Intel.</p>
<p>Related Stories: <a href="http://www.podtech.net/home/search/IntelMooresLaw">IntelMooresLaw</a></p>
<p>More Information:<br />
<a href="http://media.podtech.net/redirects/intel/research/platform/terascale/index.htm ">Intel Tera-Scale Research</a> (80-Core animation available on this site)<br />
<a href="http://media.podtech.net/redirects/intel/pressroom">Intel Pressroom</a><br />
<a href="http://media.podtech.net/redirects/intel/technology/magazine/index.htm?iid=trpage_inc+mag">Technolgy @ Intel Magazine</a><br />
<a href="http://media.podtech.net/redirects/intel/technology/itj/index.htm">Intel Technology Journal</a></p>
<p><i>Transcript:</i></p>
<p><strong>Guest: Nitin Borkar - Intel<br />
Guest: Saurabh Dighe - Intel<br />
Guest: Sriram Vangal - Intel</strong></p>
<p><strong>Nitin Borkar - Intel</strong><br />
Intel’s Teraflop Research Chip consists of lot of innovations going forward for multi-core architectures. Some of them are rapid design conversions, network-on-a-chip and fine-grain power management. Bringing Tera-scale computing to PCs and servers requires a new way of building processors that can be thought of as a network of powerful computers on a chip.</p>
<p>This Teraflop Research Chip is one important example of how the Intel Tera-scale Computing Research Program aims to change the future through constant hardware and software innovations. In addition to the compute element, each core contains a 5-port message passing router. These are connected in a 2D mesh network that implement message-passing protocol. This network on a chip mesh interconnect scheme could prove much more scalable than today’s multi-core interconnect, allowing better connection between the cores. </p>
<p>In the past, you have seen Teraflop computing at the system level. In fact, just 10 years ago, Intel Chip, their first Teraflop machine to Sandia labs, which consisted of multiple cupboards, and that would have probably fit in this room. Today, after 10 years, we’re going to demonstrate Intel’s technical leadership and manufacturing capability. We’re embedding that same performance in this chip.</p>
<p><strong>Saurabh Dighe - Intel</strong><br />
What we have here first is this custom made board, was designed in this lab. The other thing is the chip is sitting right underneath this chiller head, they’ve got these cables providing the supply to the board. Each cable here provides 50 amps. The cables here are the J-Tech controls and the input-output of the chip.</p>
<p><strong>Sriram Vangal - Intel</strong><br />
  Hi, the display on the left side shows 80 tiles on a single chip with each tile consisting of dual floating point engines and an on-dial router responsible for communication between the tiles. So, the maximum achieved frequency on this chip is 5 gigahertz, and with all 80 tiles running a blocked matrix version, the peak performance on the &#8212; observe this, 1.6 Teraflops.</p>
<p>Copyright   &copy;2006 <a href="http://PodTech.net">PodTech.net</a>. All rights reserved. Privacy policy</p>
<p>Tags: <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/80-core" rel="tag">80-core</a>, <a href="http://www.podtech.net/home/search/Justin+Rattner" rel="tag">Justin Rattner</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw" rel="tag">IntelMooresLaw</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2007/02/PID_001990/Podtech_Intel_Teraflops_research_ipod.mp4" length="10170847" type="video/mpeg"/>

	<itunes:author>Editor </itunes:author>
<itunes:duration>03:03</itunes:duration>
<itunes:keywords>podtech, intel-moores-law, intel-pca-past-and-future, corporate, intel, technology</itunes:keywords>
	</item>
	
	

	<item>
		<title>Intel Proposes 80 Core&#8230; For Your Laptop</title>
		<link>http://www.podtech.net/home/2080/intel-proposes-80-core-for-your-laptop</link>
		<comments>http://www.podtech.net/home/2080/intel-proposes-80-core-for-your-laptop#comments</comments>
		<pubDate>Mon, 12 Feb 2007 16:44:57 +0000</pubDate>
		<dc:creator>Jason Lopez</dc:creator>
		
		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Intel Moore's Law]]></category>

		<category><![CDATA[Intel PCA Past and Future]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[Intel]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/2080/intel-proposes-80-core-for-your-laptop</guid>
		<description><![CDATA[Intel says it has developed an 80-core microprocessor chip that could enable PCs and chip-enabled devices to perform Teraflop level computing. The company will offer more details of its research in a series of scientific papers at the annual Integrated Solid State Circuits Conference this week in San Francisco. The chip maker says the result [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://media.podtech.net/redirects/intel">Intel</a> says it has developed an 80-core microprocessor chip that could enable PCs and chip-enabled devices to perform Teraflop level computing. The company will offer more details of its research in a series of scientific papers at the annual Integrated Solid State Circuits Conference this week in San Francisco. The chip maker says the result of providing such chips to the market could help usher in artificial intelligence, instant video communications, photo-realistic games, multimedia data mining and real-time speech recognition. The demonstration model unveiled last week in San Francisco, however, is not a prototype for a product. Still, the company says the technology would be built into future chips designs. Jason Lopez of PodTech spoke with Intel CTO Justin Rattner.</p>
<p><a href="http://www.podtech.net/home/technology/2107/intel-scientists-talk-tereflops">Here&#8217;s an interesting video</a> produced by Intel at their research facility in Hillsboro, Oregon featuring engineers who are working on 80-core technology.</p>
<p>Related Stories: <a href="http://www.podtech.net/home/search/IntelMooresLaw">IntelMooresLaw</a></p>
<p>More Information:<br />
<a href="http://media.podtech.net/redirects/intel/research/platform/terascale/index.htm ">Intel Tera-Scale Research</a> (80-Core animation<br />
available on this site)<br />
<a href="http://media.podtech.net/redirects/intel/pressroom">Intel Pressroom</a><br />
<a href="http://media.podtech.net/redirects/intel/technology/magazine/index.htm?iid=trpage_inc+mag">Technolgy @ Intel Magazine</a><br />
<a href="http://media.podtech.net/redirects/intel/technology/itj/index.htm">Intel Technology Journal</a></p>
<p><i>Transcript:</i></p>
<p><strong>Host: Jason Lopez – PodTech</strong></p>
<p><strong>Jason Lopez – PodTech</strong><br />
  What’s better than a teraflop computer in a room? Obviously, a teraflop computer on a chip. What this is a production prototype of the world’s first teraflop on a chip die. Each of these dies has 80 simple floating-point cores on them with stacked SRAM. There are over 80 die on this wafer. Each 80-core die is capable of a teraflop performance with the ability to transfer terabytes -per-second of data between the cores and the stacked SRAM. Now it’s a prototype, but we think that the capability embodied by this prototype chip is going to be commercially available in a five-year window and that allows us to do some very amazing things.</p>
<p>This kind of performance gives us, the first time capability to imaging things like real-time video search or real-time speech translation from one language to another. Now, at the most fundamental level, the thing that makes all this work, the thing that makes this come alive is the transistor. And a lot has changed in the world of computing, but there’s been one constant, and that’s Moore’s Law.</p>
<p>Video plays &#8212; We hear a lot about Moore’s Law, but I don’t think that most people are aware of what doubling every two years really means. </p>
<p>(Music)</p>
<p><strong>Mark Bohr - Intel </strong><br />
  When I first joined Intel, the smallest transistor dimensions were about 3 microns. Today the smallest dimensions are around 30 nanometers, a 100 times smaller. Over the years, our process technology has changed dramatically. Our wafer sizes have grown from a 3-inch diameter in 1978 to today’s 12-inch diameter, and we have switched from bipolar to NMOS to CMOS technology, and more recent innovations have been “locate dielectrics”, copper interconnects, and strained silicon transistors.</p>
<p>In each case, the goal was to improve performance and to reduce power. So, while the concept of Performance-per-watt is somewhat new to the industry, power considerations have been a focus for Intel all along. </p>
<p><strong>Yan Borodovsky – Intel</strong><br />
  Lithography is how we reproduce, the design patterns on the chip. Of all the manufacturing steps, it is the most complex and most expensive. Patterns created by a chip designer are first etched into the mask then transferred by shining light through the mask onto the wafer. The process requires the most advanced lenses known to mankind. At the Intel we have a huge advantage over our competitors because we design and make our masks in-house. Our mask teams collaborate closely with our patterning teams to develop resolution, enhanced capability, to deliver higher-density patterning, earlier and with lower cost.</p>
<p><strong>Mark Bohr - Intel </strong><br />
  Moore’s Law isn’t like a natural law. It doesn’t just happen. We began working on 65-nanometer over five years ago. And are now working on processes for use five years or more from now. Gordon Moore formulated a law. Now it’s up to us to keep him honest.</p>
<p>Copyright   &copy;2006 <a href="http://PodTech.net">PodTech.net</a>. All rights reserved. Privacy policy</p>
<p>Tags: <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/microprocessor" rel="tag">microprocessor</a>, <a href="http://www.podtech.net/home/search/Teraflop" rel="tag">Teraflop</a>, <a href="http://www.podtech.net/home/search/Integrated+Solid+State+Circuits+Conference" rel="tag">Integrated Solid State Circuits Conference</a>, <a href="http://www.podtech.net/home/search/artificial+intelligence" rel="tag">artificial intelligence</a>, <a href="http://www.podtech.net/home/search/Jason+Lopez" rel="tag">Jason Lopez</a>, <a href="http://www.podtech.net/home/search/Justin+Rattner" rel="tag">Justin Rattner</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw" rel="tag">IntelMooresLaw</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2007/02/PID_001991/Podtech_Intel80.mp3" length="5570376" type="audio/mpeg"/>

	<itunes:author>Jason Lopez</itunes:author>
<itunes:duration>04:37</itunes:duration>
<itunes:keywords>podtech, intel-moores-law, intel-pca-past-and-future, corporate, intel, technology</itunes:keywords>
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		<title>Intel Says 45 Nanometer Microprocessors Due Later This Year</title>
		<link>http://www.podtech.net/home/1971/intel-says-45-nanometer-microprocessors-due-later-this-year</link>
		<comments>http://www.podtech.net/home/1971/intel-says-45-nanometer-microprocessors-due-later-this-year#comments</comments>
		<pubDate>Sat, 27 Jan 2007 08:20:06 +0000</pubDate>
		<dc:creator>Jason Lopez</dc:creator>
		
		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[Intel Moore's Law]]></category>

		<category><![CDATA[Intel PCA Past and Future]]></category>

		<category><![CDATA[Corporate]]></category>

		<category><![CDATA[PodTech News]]></category>

		<category><![CDATA[Intel]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/1971/intel-says-45-nanometer-microprocessors-due-later-this-year</guid>
		<description><![CDATA[This video was commissioned by Intel.
Intel announced that it will begin making 45 nanometer chips, code-named Penryn, in the second half of the year. The new microprocessors are the culmination of years of R&#038;D using new materials to improve the efficiency and performance of silicon-based semiconductors.
The company says the new chip technology maintains Moore&#8217;s Law, [...]]]></description>
			<content:encoded><![CDATA[<p>This video was commissioned by Intel.</p>
<p><a href="http://media.podtech.net/redirects/intel/pressroom/kits/45nm/index.htm">Intel announced</a> that it will begin making <a href="http://media.podtech.net/redirects/intel/go/45nm">45 nanometer</a> chips, code-named Penryn, in the second half of the year. The new microprocessors are the culmination of years of R&#038;D using new materials to improve the efficiency and performance of silicon-based semiconductors.</p>
<p>The company says the new chip technology maintains Moore&#8217;s Law, the observation made by Intel co-founder Gordon Moore in the late 1960s that the number of transistors doubles on chips every two years. Intel scientists say that transistors are now so small that more than 300 can fit on a human red blood cell.</p>
<p>In a recent earnings announcement, <a href="http://media.podtech.net/redirects/intel/">Intel</a> officials said they expect to rebuild a lead in the computer chip market through innovation and manufacturing efficiency. Intel&#8217;s current line of microprocessors includes the Core2Duo, Core2Extreme, and Core2Quad.</p>
<p>In this video podcast, PodTech&#8217;s Jason Lopez visits Intel&#8217;s Hillsboro, Oregon research facility and fab.</p>
<p>Related Stories: <a href="http://www.podtech.net/home/search/IntelMooresLaw">IntelMooresLaw</a></p>
<p><i>Transcript:</i><br />
<strong>Host: Jason Lopez – PodTech<br />
Guests: Intel Spokesperson<br />
Guest: Kelin Kuhn - Intel<br />
</strong></p>
<p><strong>Jason Lopez – PodTech<br />
  </strong>Transistors are the miniature machines of the heart of computers. The first transistors built on silicon in the 1960’s were relatively large compared to those of today. But in the last few years, scientists have sensed The End of Moore’s Law as the quest to double a number of transistors on a chip every two years has pushed the limits of physics.</p>
<p>This test wafer is used to measure the reliability of billions of H transistor and interconnect features, the blue prints for making microprocessors. For nearly 40 years, transistors have been made from a polysilicon gate and silicon gate oxide, the materials used to create the switch inside that turns it on and off. But with 65 nanometer technology currently in production, those materials have been pushed to their physical limits. To go smaller at 45 nanometers scientists said Intel chose new materials a Metal gate and High-K gate oxide based on the element hafnium. These materials have enabled yet again the doubling of the density of transistors within a two-year timeframe.</p>
<p>Intel code names its new family of 45 nanometer chips ‘Penryn’ which deliver a significant improvement in power efficiency and performance.</p>
<p><strong>Speaker</strong><br />
  This is a really tremendous accomplishment to get all the way down to 45 nanometer dimensions. When I joined Intel five micron dimensions were common. 45 nanometers is more than a 100 times smaller than that. So, quite remarkable.</p>
<p><strong>Kelin Kuhn - Intel</strong><br />
  If you think about it, if you look at the Intel 45 nanometer device technology, we can fit 400 transistors on something about the size of the human blood cell.</p>
<p><strong>Speaker</strong><br />
  So, it allows us to continue scaling and maintain this Moore’s Law type of evolutionary built up we’ve seen.</p>
<p><strong>Speaker </strong><br />
  Well, developing smaller transistors or technologies with smaller feature size is very key, because it allows you to pack more transistors on a chip which means you can do more things with that chip, that also means that these transistors when they’re smaller can use less energy when you switch them on and off. So, you have better power efficiency, you can get certain computational functions done using less energy, less power.</p>
<p><strong>Jason Lopez - PodTech</strong><br />
  Intel’s drive to adhere to Moore’s Law is as much an economic decision as it is a scientific one. It’s one thing to make the Metal gate and High-K gate oxide technologies work. It’s another to make 45 nanometer chips enlarged volumes to satisfy the market. Intel’s lead in the chip industry is based on its ability to deliver cheaper and faster microprocessors.</p>
<p><strong>Speaker</strong><br />
  Well, one of the key things that Intel does very well is what’s called Design for Manufacturability and the key there is to make sure that the product design and the process manufacturing technology are able to work together and produce high yielding, high quality products and because we’re an integrated device manufacturer, we do the design in-house, we do the process development in-house, we’re able to do a really good job at Design for Manufacturability up front and produce these chips in high volume.</p>
<p><strong>Jason Lopez - PodTech</strong><br />
  Metal gate and High-K gate oxide only atoms thick are more electrically efficient helping to reduce heat and power lost from leakage and improving transistor performance by 20%. The idea to use new materials has been around for more than a decade, but the technologies to deploy them were developed by hundreds of engineers over the past few years.</p>
<p><strong>Kelin Kuhn - Intel</strong><br />
  Okay so, if you think about how we build gate oxides, historically, we’ve used very simple silicon dioxide materials basically glass, and as we’ve developed our technology expertise over the years we started doing very elegant things to this glass to make ever better oxides basically the gate of the transistor.</p>
<p>When we introduced the Intel 45 nanometer process we moved a hafnium-based material as a radically different way of resolving our gate leakage issues and so it’s a very novel material system that’s intrinsic to the type of leakage improvements we see. Chip design was simple once and we don’t do that anymore. It’s complicated now because we already did the simple stuff that’s my humorous answer, but I think in today’s world if you look at a modern microprocessor. We’re talking hundreds of millions of transistors and it’s incomprehensible that humans can build this to be honest.</p>
<p>Every time we have a success in the fab. I sit back and look at this and we’re looking at devices that are one-tenth the wavelength of light. Little tinnie winnie devices and humans can build these very complicated things and if you think about it, a yielding dye in our process technology means every single transistor worked. Every single one of those 100 million transistors worked and that’s when we sell them. Can you believe it? Humans can actually make something where every single one of a hundred million plus devices worked, it’s remarkable, and we don’t do it as individuals, we do it as an international team.</p>
<p><strong>Speaker</strong><br />
  We had the fly of the wafers to Arizona, get them assembled and then fly them back to Folsom, California in order to actually test them.</p>
<p><strong>Jason Lopez - PodTech</strong><br />
  So, what was the feeling of the team when you booted up that first OS?</p>
<p><strong>Speaker</strong><br />
  I would say one word it was ‘Euphoria’. The team was just tremendously excited. When you considered a number of people involved in the two–and-a-half years that culminated in this boolean of major Operating System with Penryn, it was an awesome feeling.</p>
<p><strong>Jason Lopez - PodTech</strong><br />
  Is that simply because it worked or is it because a number of things work?</p>
<p><strong>Speaker</strong><br />
  Yeah, it really represents the fact that a number of things worked. Coming out of reset is not so monumentous as say (Inaudible) up to boot Windows XP, or Windows Vista or Linux because there is a lot of functionality that has to be working to reach that level of capability. So, the team was obviously excited for that. All this happened around. I believe we booted around 3:30 in the morning and there was just a lot of adrenalin in the lab at that time and this is a lot of excitement.</p>
<p><strong>Jason Lopez - PodTech</strong><br />
It’s like a moon shot only you didn’t have the big screen looking.</p>
<p><strong>Speaker</strong><br />
Yeah, you could say that. Maybe on a smaller scale, but yeah, that’s equivalent to us on the engineering team as our moon shot.</p>
<p>Copyright &copy;2006 <a href="http://PodTech.net">PodTech.net</a>. All rights reserved. Privacy policy</p>
<p>Tags: <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/45+nanometer" rel="tag">45 nanometer</a>, <a href="http://www.podtech.net/home/search/Penryn" rel="tag">Penryn</a>, <a href="http://www.podtech.net/home/search/microprocessors" rel="tag">microprocessors</a>, <a href="http://www.podtech.net/home/search/semiconductors" rel="tag">semiconductors</a>, <a href="http://www.podtech.net/home/search/Moore%26%238217%3Bs+Law" rel="tag">Moore&#8217;s Law</a>, <a href="http://www.podtech.net/home/search/Gordon+Moore" rel="tag">Gordon Moore</a>, <a href="http://www.podtech.net/home/search/Intel" rel="tag">Intel</a>, <a href="http://www.podtech.net/home/search/Core2Duo" rel="tag">Core2Duo</a>, <a href="http://www.podtech.net/home/search/Core2Extreme" rel="tag">Core2Extreme</a>, <a href="http://www.podtech.net/home/search/Core2Quad" rel="tag">Core2Quad</a>, <a href="http://www.podtech.net/home/search/Jason+Lopez" rel="tag">Jason Lopez</a>, <a href="http://www.podtech.net/home/search/IntelMooresLaw" rel="tag">IntelMooresLaw</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2007/01/PID_001917/Podtech_Intel45nM_revised_ipod.mp4" length="27646197" type="video/mpeg"/>

	<itunes:author>Jason Lopez</itunes:author>
<itunes:duration>08:40</itunes:duration>
<itunes:keywords>podtech, intel-moores-law, intel-pca-past-and-future, corporate, podtech-news, intel, technology</itunes:keywords>
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		<title>Heidi Roizen on Silicon Valley and Startups</title>
		<link>http://www.podtech.net/home/1371/heidi-roizen-on-silicon-valley-and-startups</link>
		<comments>http://www.podtech.net/home/1371/heidi-roizen-on-silicon-valley-and-startups#comments</comments>
		<pubDate>Thu, 26 Oct 2006 19:06:32 +0000</pubDate>
		<dc:creator>John Furrier</dc:creator>
		
		<category><![CDATA[Enterprise 2.0]]></category>

		<category><![CDATA[Entrepreneurship with John Furrier]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/home/1371/heidi-roizen-on-silicon-valley-and-startups</guid>
		<description><![CDATA[Heidi Roizen is the managing director of Mobius Venture Capitaland chairman-elect of the National Venture Capital Association. An entrepreneur and true Silicon Valley native, she has a unique perspective on the pc revolution.]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.roizen.com/heidi/">Heidi Roizen</a> is the managing director of Mobius Venture Capital and chairman-elect of the <a href="http://www.nvca.org/">National Venture Capital Association</a>. And since she&#8217;s an entrepreneur and also a true Silicon Valley native, she has a unique perspective on the pc revolution. She has gotten to know all the tech gurus and celebrities before they became famous.  <a href="http://www.podtech.net/home/1371/heidi-roizen-on-silicon-valley-and-startups#more-1371" class="more-link">(more&#8230;)</a></p>
<p>Tags: <a href="http://www.podtech.net/home/search/Heidi+Roizen" rel="tag">Heidi Roizen</a>, <a href="http://www.podtech.net/home/search/Mobius+Venture+Capital" rel="tag">Mobius Venture Capital</a>, <a href="http://www.podtech.net/home/search/Silicon+Valley" rel="tag">Silicon Valley</a></p>]]></content:encoded>
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	        <enclosure url="http://media1.podtech.net/media/2006/10/PID_001266/Podtech_EPS_Heidi_Roizen_Conversation.mp3" length="17098294" type="audio/mpeg"/>

	<itunes:author>John Furrier</itunes:author>
<itunes:duration>17:48</itunes:duration>
<itunes:keywords>tech, entrepreneurship, technology</itunes:keywords>
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		<title>New Media Model - It&#8217;s a Network of Networks Emerging</title>
		<link>http://www.podtech.net/home/926/new-media-model-its-a-network-of-networks-emerging</link>
		<comments>http://www.podtech.net/home/926/new-media-model-its-a-network-of-networks-emerging#comments</comments>
		<pubDate>Sun, 06 Aug 2006 17:55:33 +0000</pubDate>
		<dc:creator>Admin</dc:creator>
		
		<category><![CDATA[Blog]]></category>

		<guid isPermaLink="false">http://www.podtech.net/?p=926</guid>
		<description><![CDATA[The world is clearly moving to a &#8220;Network of Networks&#8221; we&#8217;ll all be interconnected in some way and it looks like the smartest technology companies are moving that way. 
Feedburner is testing a new concept called Feedburner Network as outlined by Brad Feld, who sits on their board of directors.  Brad writes &#8220;A FeedBurner [...]]]></description>
			<content:encoded><![CDATA[<p>The world is clearly moving to a &#8220;Network of Networks&#8221; we&#8217;ll all be interconnected in some way and it looks like the smartest technology companies are moving that way. </p>
<p>Feedburner is testing a new concept called Feedburner Network <a href="http://www.feld.com/blog/archives/001886.html">as outlined by Brad Feld</a>, who sits on their board of directors.  Brad writes &#8220;A FeedBurner Network is a collection of blogs that fit within a particular topic.  The goal is to create high quality collections of similar types of publishers.  For example, if you are interested in reading Venture Capital bloggers, you currently have to manually poke around to find them.&#8221;  Fred Wilson another investor<a href="http://avc.blogs.com/a_vc/2006/08/self_forming_co.html"> has a post talking about it </a>as well. </p>
<p>Networks are a key focus for providing some user coherency to the flood of all the new user generated content.  What&#8217;s interesting about this announcement is that Feedburners primary model is to host a blogs feed and now they are expanding to providing a filtered approach to content aggregration and user consumption.  Oh they provide ads too in the feeds.  Mike Arrington thinks that it is a hard or impossible task.  What I find fascinating about this story is that it isn&#8217;t Feedburner that is doing this&#8230;it&#8217;s the board members Feld and Wilson.  To me that is the big story here&#8230; Talk about board added value. Kudos to Brad and Fred.  </p>
<p>Mike Arrington who started Techcrunch as a small blog has become the Techcrunch Network <a href="http://www.techcrunch.com/2006/08/06/feedburner-testing-blog-networks/">has an opinion on the topic</a>.   Mike says &#8220;The biggest issue around this will be what rules are used to determine which blogs are included in a given topic. It isn’t clear if there will be any real quality control - in his post Brad says each network will have a gatekeeper to make sure only blogs on topic are included, but there doesn’t appear to be any hurdle as to what constitutes a quality blog in a topic. That could work out badly. And if the bloggers and/or the network coordinator are making subjective decisions on which blogs can be included in a given network, this will end in tears. The politics around who’s in and who’s out of a blog network are impossible.&#8221;  </p>
<p>Obviously PodTech is a big fan of what Feedburner is doing and the ideas that Brad and Fred put out.  The PodTech Network has been developing over the past 8 months with very good success.  The world is clearly moving to a &#8220;Network of Networks&#8221; we&#8217;ll all be interconnected in some way and it looks like the smartest technology companies are moving that way.</p>
]]></content:encoded>
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<itunes:keywords>blog</itunes:keywords>
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		<title>PodTech News:  RSA Conference 2006, Microsoft Corp. Chairman and Chief Software Architect Bill Gates&#8217; Keynote Address</title>
		<link>http://www.podtech.net/home/334/podtech-news-rsa-conference-2006-microsoft-corp-chairman-and-chief-software-architect-bill-gates-keynote-address</link>
		<comments>http://www.podtech.net/home/334/podtech-news-rsa-conference-2006-microsoft-corp-chairman-and-chief-software-architect-bill-gates-keynote-address#comments</comments>
		<pubDate>Tue, 14 Feb 2006 23:34:23 +0000</pubDate>
		<dc:creator>John Furrier</dc:creator>
		
		<category><![CDATA[PodTech]]></category>

		<category><![CDATA[PodTech News]]></category>

		<category><![CDATA[Technology]]></category>

		<guid isPermaLink="false">http://www.podtech.net/?p=334</guid>
		<description><![CDATA[Here is what Microsoft had to say, &#8220;In his keynote address at the RSA Conference 2006, Microsoft Corp. Chairman and Chief Software Architect Bill Gates shared Microsoft’s immediate and future plans to achieve a more secure digital future, where interconnected networks worldwide allow people to work and play across a multitude of devices, products, services [...]]]></description>
			<content:encoded><![CDATA[<p>Here is what Microsoft had to say, &#8220;In his keynote address at the RSA Conference 2006, Microsoft Corp. Chairman and Chief Software Architect Bill Gates shared Microsoft’s immediate and future plans to achieve a more secure digital future, where interconnected networks worldwide allow people to work and play across a multitude of devices, products, services and organizations, with greater confidence in the security of their experiences. Gates highlighted advancements in the forthcoming Windows Vista™ release such as isolation techniques to reduce the impact of malware, improved identity and access controls, and better data protection. He also showcased innovations surrounding the platform such as Windows OneCare™ Live, and industry partnerships such as the SecureIT Alliance. He called for the industry to come together to achieve a more secure computing experience for all users.&#8221;</p>
]]></content:encoded>
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	<itunes:author>John Furrier</itunes:author>
<itunes:duration>45:35</itunes:duration>
<itunes:keywords>podtech, podtech-news, technology</itunes:keywords>
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