The Intel Developer Forum has evolved into one of the most important technology events of the year. For anyone making hardware and software, IDF provides a way to learn about critical advances in chip design, and it gives Intel the opportunity to get feedback from developers. For the rest of ...

In this audio podcast, Nehalem lead architect Ronak Singhal discusses the significant performance and power improvements of Intel’s latest leap in microarchitectural design. The technology has significant implications for dynamic scalability, design and performance scalability, simultaneous multi-threading, scalable shared memory and multi-level shared caching. The ground-up design takes ...

The current uptake in high performance computing means mostly good things, but it also comes with a few built-in challenges. The paradox of this particular progress is this: when you scale hardware, you oftentimes scale power consumption, right along with it. That’s where Intel’s Shesha Krishnapura has some good news ...

High-performance computing presents unique challenges in performance, energy efficiency and parallel processing, and Intel has just unveiled a unique solution. The Intel Xeon processors and platforms use an entirely new transistor formula based on the second generation of the Intel Core microarchitecture. Intel’s new high-performance computing (HPC) platform ...

Intel’s next-generation 45nm Hi-k microarchitecture (code named “Nehalem”) is a dynamically scalable microarchitecture that delivers breakthrough energy-efficient performance.

Related Stories: IntelIDF, IntelMooresLaw

In his keynote today at the Intel Developer Forum in San Francisco, Patrick Gelsinger, senior vice president and general manager of Intel’s Digital Enterprise Group, gave a broad update on Intel’s efforts this year.

In this podcast, Gelsinger covers what he calls the company’s “relentless pursuit of Moore’s Law,” spotlighting

45nm Program Manager Kaizad Mistry takes you inside the groundbreaking 45nm Hi-k metal gate process technology used in the next generation of Intel Core microarchitecture.

Related stories: Intel, IntelMooresLaw

Intel unveiled the next stages for its new 45 nanometer process technology. The new microarchitecture is code-named Nehalem and represents a major shift in design. The technology is aimed partly at the requirements of next-generation media services over the Internet. Chips based on Nehalem are expected to launch in 2008. ...

Kirk Skaugen is vice president of the Digital Enterprise Group and co-general manager of the Intel Server Platforms Group . In this podcast Skaugen talks about practical applications for Intel’s server and workstation platforms working with Intel’s Core Microarchitecture such as the Xeon 5100.

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Tom Kilroy is vice president and general manager of Intel Corporation’s Digital Enterprise Group. He covers computing and communications infrastructure platforms for business. In this podcast he introduces Intel’s new microprocessor for server computers, the first chips built with Intel’s ...

Intel Developer Forum - Justin Rattner, CTO Keynote Part 1 of 3 - March 7, 2006, San Francisco

“Join Justin Rattner for a technology tour de force on the key challenges facing the industry and Intel’s multifaceted response of complete platform solutions - from transistors through software. Justin will ...